caltiming5

         
      
Module Instance Base Address Register Address
i_io48_hmc_mmr_io48_mmr 0xFFCFA000 0xFFCFA090

Offset: 0x90

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

cfg_t_param_srf_to_zq_cal

0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

cfg_t_param_srf_to_zq_cal

0x0

cfg_t_param_srf_to_valid

0x0

caltiming5 Fields

Bit Name Description Access Reset
19:10 cfg_t_param_srf_to_zq_cal
Self refresh to ZQ calibration window
RW 0x0
9:0 cfg_t_param_srf_to_valid
Self-refresh to valid bank command window.
RW 0x0