caltiming4

         
      
Module Instance Base Address Register Address
i_io48_hmc_mmr_io48_mmr 0xFFCFA000 0xFFCFA08C

Offset: 0x8C

Access: RW

Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

cfg_t_param_pdn_to_valid

0x0

cfg_t_param_arf_to_valid

0x0

cfg_t_param_pch_all_to_valid

0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

cfg_t_param_pch_all_to_valid

0x0

cfg_t_param_pch_to_valid

0x0

cfg_t_param_wr_ap_to_valid

0x0

caltiming4 Fields

Bit Name Description Access Reset
31:26 cfg_t_param_pdn_to_valid
Power down to valid bank command window.
RW 0x0
25:18 cfg_t_param_arf_to_valid
Auto Refresh to valid DRAM command window.
RW 0x0
17:12 cfg_t_param_pch_all_to_valid
Precharge all to banks being ready for bank activation command.
RW 0x0
11:6 cfg_t_param_pch_to_valid
Precharge to valid command timing.
RW 0x0
5:0 cfg_t_param_wr_ap_to_valid
Write with autoprecharge to valid command timing.
RW 0x0