Arria GX FPGAs

• Altera Product Catalog (ver 14.0, Jul 2014, 14 MB)
  
• 1080p video framework from Altera (ver 1.0, Apr 2008, 230 KB)
  
• Development boards for broadcast applications (ver 2.0, Apr 2008, 122 KB)
  

AN 553: Design Files

• AN 553: Debugging Transceivers (ver 1.1, Dec 2009, 1 MB)
  AN 553: Design Files (874 KB)
  

• Altera Product Catalog (ver 14.0, Jul 2014, 14 MB)
  
• Versatile Digital QAM Modulator (ver 2.0, Dec 2010, 553 KB)
  

• AN 537: Implementing UNH-IOL Test Suite Compliance in Arria GX and Stratix II GX Gigabit Ethernet Designs (ver 1.0, Sep 2008, 514 KB)
  carrier_detect_logic.zip (2 KB)
  
• AN 553: Debugging Transceivers (ver 1.1, Dec 2009, 1 MB)
  AN 553: Design Files (874 KB)
  

• Arria GX PowerPlay Early Power Estimator (ver 8.1, Nov 2009, 18 KB)
  (Final)
  PowerPlay Early Power Estimator User Guide for Arria GX FPGAs (9 KB)
  

• AN 328: Interfacing DDR2 SDRAM with Stratix II, Stratix II GX, and Arria GX Devices (ver 6.0, Oct 2009, 3 MB)
  ALTMEMPHY Example (604 KB)
  Legacy PHY Example (330 KB)
  
• AN 449: External Memory Interface Design Guidelines for Stratix II, Stratix II GX, and Arria GX Devices (ver 1.2, Sep 2007, 284 KB)
  
• AN 462: Implementing Multiple Memory Interfaces Using the ALTMEMPHY Megafunction (ver 1.3, Apr 2009, 784 KB)
  Example Design for AN 462: top.qar (715 KB)
  
• DDR Timing Wizard User Guide (ver 3.0, Nov 2007, 2 MB)
  
• External Memory PHY Interface (ALTMEMPHY) (nonAFI) Megafunction User Guide (ver 7.3, Jan 2010, 3 MB)
  

Section I. Arria GX Device Family Data Sheet

• Chapter 1. Arria GX Device Family Overview (ver 2.0, Dec 2009, 60 KB)
• Arria GX Architecture (ver 2.0, Dec 2009, 3MB)
• Configuration and Testing (ver 2.0, Dec 2009, 117 KB)
• DC and Switching Characteristics (ver 2.0, Dec 2009, 774 KB)
• Reference & Ordering Information (ver 2.0, Dec 2009, 54 KB)

Section I. Arria GX Transceiver User Guide

• Chapter 1. Arria GX Transceiver Architecture (ver 2.0, May 2008, 876 KB)
• Chapter 2. Arria GX Transceiver Protocol Support and Additional Features (ver 2.0, May 2008, 845 KB)
• Chapter 3. Arria GX ALT2GXB Megafunction User Guide (ver 2.0, May 2008, 5 MB)
• Chapter 4. Specifications and Additional Information (ver 1.0, May 2007, 193 KB)

Section II. Clock Management

• Chapter 5. PLLs in Arria GX Devices (ver 1.2, May 2008, 843 KB)

Section III. Memory

• Chapter 6. TriMatrix Embedded Memory Blocks in Arria GX Devices (ver 1.2, May 2008, 375 KB)
• Chapter 7. External Memory Interfaces in Arria GX Devices (ver 1.2, May 2008, 296 KB)

Section IV. I/O Standards

• Chapter 8. Selectable I/O Standards in Arria GX Devices (ver 1.2, May 2008, 416 KB)
• Chapter 9. High-Speed Differential I/O Interfaces with DPA in Arria GX Devices (ver 1.2, May 2008, 269 KB)

Section V. Digital Signal Processing (DSP)

• Chapter 10. DSP Blocks in Arria GX Devices (ver 1.2, May 2008, 322 KB)

Section VI. Configuration and Remote System Upgrades

• Chapter 11. Configuring Arria GX Devices (ver 1.3, May 2008, 973 KB)
• Chapter 12. Remote System Upgrades with Arria GX Devices (ver 1.2, May 2008, 295 KB)
• Chapter 13. IEEE 1149.1 (JTAG) Boundary Scan Testing for Arria GX (ver 1.2, May 2008, 274 KB)

Section VII. PCB Layout Guidelines

• Chapter 14. Package Information for Arria GX Devices (ver 1.1, May 2008, 253 KB)