PDF Documentation
- Stratix III Device Handbook (All Sections) (10 MB)
- Volume 1 - Stratix III Device Handbook (ver 2.2, Mar 2011, 7 MB)
- Volume 2 - Stratix III Device Datasheet (ver 2.3, Jul 2010, 3 MB)
Section I. Device Core
- Chapter 1. Stratix III Device Family Overview (ver 1.8, Mar 2010, 188 KB)
- Chapter 2. Logic Array Blocks & Adaptive Logic Modules in Stratix III Devices (ver 1.5, May 2009, 260 KB)
- Chapter 3. MultiTrack Interconnect in Stratix III Devices (ver 1.2, May 2009, 124 KB)
- Chapter 4. TriMatrix Embedded Memory Blocks in Stratix III Devices (ver 1.7, May 2009, 481 KB)
- Chapter 5. DSP Blocks in Stratix III Devices (ver 1.7, Mar 2010, 493 KB)
- Chapter 6. Clock Networks and PLLs in Stratix III Devices (ver 2.0, Jul 2010, 962 KB)
Section II. I/O Interfaces
- Chapter 7. Stratix III Device I/O Features (ver 1.9, Jul 2010, 954 KB)
- Chapter 8. External Memory Interfaces in Stratix III Devices (ver 1.9, Mar 2010, 1 MB)
- Chapter 9. High-Speed Differential I/O Interfaces with DPA in Stratix III Devices (ver 1.9, Jul 2010, 588 KB)
Section III. Hot Socketing, Configuration, Remote Upgrades & Testing
- Chapter 10. Hot Socketing & Power-On Reset in Stratix III Devices (ver 1.7, Mar 2010, 133 KB)
- Chapter 11. Configuring Stratix III Devices (ver 2.0, Mar 2011, 1 MB)
- Chapter 12. Remote System Upgrades with Stratix III Devices (ver 1.5, Mar 2010, 272 KB)
- Chapter 13. IEEE 1149.1 (JTAG) Boundary Scan Testing in Stratix III Devices (ver 1.9, Jul 2010, 395 KB)
Section IV. Design Security and Single Event Upset (SEU) Mitigation
- Chapter 14. Design Security in Stratix III Devices (ver 1.5, May 2009, 131 KB)
- Chapter 15. SEU Mitigation in Stratix III Devices (ver 1.7, Mar 2010, 233 KB)
Section V. Power and Thermal Management
- Chapter 16. Programmable Power & Temperature Sensing Diode in Stratix III Devices (ver 1.5, May 2009, 152 KB)
Section VI. Packaging Information
- Chapter 17. Stratix III Device Package Information (ver 1.7, Mar 2010, 47 KB)
Volume 2 - Stratix III Device Datasheet (ver 2.3, Jul 2010, 3 MB)
- Chapter 1. DC and Switching Characteristics of Stratix III Devices (ver 2.3, Jul 2010, 3 MB)
- AN 461: Design Guidelines for Implementing QDRII+ and QDRII SRAM Interfaces in Stratix III and Stratix IV Devices (ver 1.2, Feb 2010, 986 KB)
- Design Example for AN 461 (3 MB)
- Design Example for AN 461 (3 MB)
- AN 462: Implementing Multiple Memory Interfaces Using the ALTMEMPHY Megafunction (ver 1.3, Apr 2009, 784 KB)
- Example Design for AN 462: top.qar (715 KB)
- Example Design for AN 462: top.qar (715 KB)
- External Memory PHY Interface (ALTMEMPHY) (nonAFI) Megafunction User Guide (ver 7.3, Jan 2010, 3 MB)
- Utilizing Leveling Techniques in DDR3 SDRAM Memory Interfaces (ver 1.0, Nov 2007, 812 KB)
- Stratix III PowerPlay Early Power Estimator (ver 13.1, Mar 2013, 7 KB)
(Final)
- Stratix_III_Advertorial (ver 1.0, Aug 2007, 98 KB)
- Accelerating High-Performance Computing With FPGAs (ver 1.1, Oct 2007, 956 KB)
- AN 437: Power Optimization in Stratix III FPGAs (ver 2.0, Aug 2007, 219 KB)
- AN 448: Stratix III Power Management Design Guide (ver 1.3, May 2007, 201 KB)
- AN 574: Printed Circuit Board (PCB) Power Delivery Network (PDN) Design Methodology (ver 1.0, May 2009, 899 KB)
- AN 583: Designing Power Isolation Filters with Ferrite Beads for Altera FPGAs (ver 1.0, Jul 2009, 878 KB)
- Device-Specific Power Delivery Network (PDN) Tool User Guide for Arria II/Stratix IV/Stratix III Device Families (ver 1.1, Sep 2012, 1 MB)
- PowerPlay Early Power Estimator User Guide (ver 2014.07.25, Jul 2014, 2 MB)
- Stratix III Programmable Power (ver 1.1, May 2007, 632 KB)
- AN 454: Implementing PLL Reconfiguration in Stratix III and Stratix IV Devices (ver 3.2, Aug 2012, 1 MB)
- Design Examples 1 (413 KB)
- Design Examples 2 (236 KB)
- Design Examples 1 (413 KB)
- AN 465: Implementing OCT Calibration in Stratix III Devices (ver 1.0, Nov 2007, 573 KB)
- Design Example 1 (200 KB)
- Design Example 2 (74 KB)
- Design Example 3 (211 KB)
- Stratix III OCT Power Up Example (46 KB)
- Design Example 1 (200 KB)
- AN 476: Impact of I/O Settings on Signal Integrity in Stratix III Devices (ver 1.0, Oct 2007, 391 KB)
- AN 518: SGMII Interface Implementation Using Soft-CDR Mode of Altera FPGAs (ver 2013.10.17, Oct 2013, 445 KB)
- Early SSN Estimator User Guide for Altera Programmable Devices (ver 1.0, Nov 2009, 788 KB)
- Stratix III Early SSN Estimator (631 KB)
- Stratix III Early SSN Estimator (631 KB)
- Stratix III FPGA Signal Integrity (ver 1.0, Nov 2006, 797 KB)
- Stratix_III_Advertorial (ver 1.0, Aug 2007, 98 KB)
- Utilizing Leveling Techniques in DDR3 SDRAM Memory Interfaces (ver 1.0, Nov 2007, 812 KB)
- Altera Product Catalog (ver 14.0, Jul 2014, 14 MB)
- Stratix_III_Advertorial (ver 1.0, Aug 2007, 98 KB)
- Versatile Digital QAM Modulator (ver 2.0, Dec 2010, 553 KB)
- AN 603: Active Serial Remote System Upgrade Reference Design (ver 1.1, Aug 2013, 862 KB)
- AN603 Design Files (1 MB)
- AN603 Design Files (1 MB)
- AN 461: Design Guidelines for Implementing QDRII+ and QDRII SRAM Interfaces in Stratix III and Stratix IV Devices (ver 1.2, Feb 2010, 986 KB)
- Design Example for AN 461 (3 MB)
- Design Example for AN 461 (3 MB)
- AN 469: Stratix III Design Guidelines (ver 1.1, May 2008, 628 KB)
- AN 504: DSP System Design in Stratix III Devices (ver 1.0, Feb 2008, 1 MB)
- Design Example 1: Parallel FIR (79 KB)
- Design Example 2: Multi-Channel FIR (20 KB)
- Design Example 3: MAC_FIR (vhdl) (21 KB)
- Design Example 4: Large Mult_Add (11 KB)
- Design Example 1: Parallel FIR (79 KB)
- AN 574: Printed Circuit Board (PCB) Power Delivery Network (PDN) Design Methodology (ver 1.0, May 2009, 899 KB)
- AN 583: Designing Power Isolation Filters with Ferrite Beads for Altera FPGAs (ver 1.0, Jul 2009, 878 KB)
- AN 603: Active Serial Remote System Upgrade Reference Design (ver 1.1, Aug 2013, 862 KB)
- AN603 Design Files (1 MB)
- AN603 Design Files (1 MB)
- AN 658: Best Design Practices for HardCopy Devices (ver 1.1, Jul 2012, 799 KB)
- Hardware/Software Co-Verification Using FPGA Platforms (ver 1.0, Aug 2008, 754 KB)
- Stratix III Device Family Pin Connection Guidelines (ver 1.3, Feb 2010, 136 KB)
- Altera Product Catalog (ver 14.0, Jul 2014, 14 MB)
- 1080p video framework from Altera (ver 1.0, Apr 2008, 230 KB)
- Development boards for broadcast applications (ver 2.0, Apr 2008, 122 KB)
- Stratix III Development Board Reference Manual (ver 1.5, May 2013, 2 MB)
- AN 717: Nios II Gen2 Hardware Development Tutorial (ver 2014.09.22, Sep 2014, 613 KB)
- Stratix_III_Advertorial (ver 1.0, Aug 2007, 98 KB)
- 1080p video framework from Altera (ver 1.0, Apr 2008, 230 KB)
- Accelerating applications on coprocessing platforms (ver 1.0, Jul 2007, 104 KB)
- Altera FPGAs for radar and advanced sensors (ver 1.0, Oct 2007, 219 KB)
- Altera wireless solutions - 3GPP Long-Term Evolution (ver 1.0, Jan 2008, 68 KB)
- AN 425: Using the Command-Line Jam STAPL Solution for Device Programming (ver 2014.09.22, Sep 2014, 1 MB)
- Development boards for broadcast applications (ver 2.0, Apr 2008, 122 KB)
- FPGA Coprocessing Evolution: Sustained Performance Approaches Peak Performance (ver 1.1, Jun 2009, 303 KB)
- Versatile Digital QAM Modulator (ver 2.0, Dec 2010, 553 KB)
- SCFIFO and DCFIFO Megafunctions User Guide (ver 8.2, May 2013, 496 KB)
DCFIFO Design Example (33 KB)
skew_report.tcl (3 KB)
- Altera FPGAs for radar and advanced sensors (ver 1.0, Oct 2007, 219 KB)
- Altera's Strategy for Delivering the Benefits of the 65-nm Semiconductor Process (ver 1.1, Sep 2006, 345 KB)
- Design Security in Stratix III Devices (ver 1.5, Sep 2009, 44 KB)
- Designing and Using FPGAs for Double-Precision Floating-Point Math (ver 1.1, Aug 2007, 683 KB)
- FPGA Performance Benchmarking Methodology (ver 1.6, Aug 2007, 246 KB)
- Guidance for Accurately Benchmarking FPGAs (ver 1.2, Dec 2007, 848 KB)
- Performing Equivalent Timing Analysis Between Altera Classic Timing Analyzer and Xilinx Trace (ver 3.0, Oct 2007, 1 MB)
- Performing Equivalent Timing Analysis Between Altera TimeQuest and Xilinx Trace (ver 1.0, Nov 2007, 1 MB)
- Robust SEU Mitigation With Stratix III FPGAs (ver 1.0, Feb 2007, 801 KB)
- SEmulation: Turbocharging the FPGA Development Process (ver 1.0, Mar 2007, 1 MB)
- Stratix III FPGAs vs. Xilinx Virtex-5 Devices: Architecture and Performance Comparison (ver 2.1, Oct 2007, 949 KB)