Intel® FPGAs and Programmable Devices / SoCs / Portfolio / Intel® Arria® 10 SoC FPGAs Support

Intel® Arria® 10 SoC FPGAs Support

  • Intel® Arria® 10 I/O Timing Spreadsheet
  • All Packaging Specifications and Dimensions
  • External Memory Interface Pin Information
  • Arria 10 SX Device Errata
  • Known Arria 10 Issues
  • Arria 10 SoC HPS Address Map and Register Definitions (HTML)
  • Arria 10 SoC HPS Address Map and Register Definitions (ZIP)
  • Pin Connection Guidelines
  • Device Pin-Outs
  • BSDL Files
  • Board Design Guidelines
  • Arria 10 SoC HPS Supported Flash Devices 
  • Arria 10 SoC Device Design Guidelines 

QUICK LINKS

  • Intel Arria 10 Device Overview
  • Intel FPGA Programmable Acceleration Card N3000 Data Sheet
  • Intel Arria 10 Device Datasheet
  • Documentation: Pin-Out Files for Intel FPGA Devices

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Document PDF Published Date Filter Doc Type Filter Collections Filter
25G Ethernet Intel FPGA IP Release Notes 2020-12-14 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes altera:intellectual-property
Advanced Link Analyzer User Guide 2020-12-16 altera:content-area/device-configuration-and-remote-system-upgrades altera:document-type/user-guide
Embedded Peripherals IP User Guide 2020-12-23 altera:content-area/i-o-interfaces-protocols-and-signal-integrity,altera:content-area/embedded-memory---dsp altera:document-type/user-guide altera:intellectual-property,altera:development-software
Intel Arria 10 Core Fabric and General Purpose I/Os Handbook 2020-11-05 altera:content-area/external-memory-interface,altera:content-area/device-configuration-and-remote-system-upgrades,altera:content-area/clocking,altera:content-area/i-o-interfaces-protocols-and-signal-integrity,altera:content-area/embedded-memory---dsp,altera:content-area/power-and-thermal-management altera:document-type/user-guide altera:content-area/recommended-documents
Intel Arria 10 Hard Processor System Technical Reference Manual 2021-01-21 altera:content-area/hard-processor-system altera:document-type/reference-manual,altera:document-type/user-guide altera:content-area/recommended-documents
Intel FPGA Software Installation and Licensing 2020-12-14 altera:document-type/reference-manual,altera:document-type/user-guide altera:development-software
10-Gbps Ethernet (10GbE) MAC IP Core Release Notes 2016-05-02 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes
100G Interlaken IP Core Release Notes 2016-05-02 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes altera:intellectual-property
50 Gbps Ethernet IP Core User Guide 2017-11-07 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
50G Ethernet IP Core Release Notes 2017-05-08 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes altera:intellectual-property
50G Interlaken IP Core Release Notes 2016-05-02 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes altera:intellectual-property
ALTERA_CORDIC IP Core User Guide 2017-05-08 altera:document-type/user-guide altera:intellectual-property
AN 699: Using the Altera Ethernet Design Toolkit 2016-05-13 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/app-notes,altera:document-type/reference-design altera:intellectual-property
AN 702: Interfacing a USB PHY to the Hard Processor System USB 2.0 OTG Controller 2017-09-22 altera:content-area/device-configuration-and-remote-system-upgrades altera:document-type/app-notes
AN 735: Altera Low Latency Ethernet 10G MAC IP Core Migration Guidelines 2015-05-04 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/app-notes
AN 736: Nios II Processor Booting From Altera Serial Flash (EPCQ) 2016-05-20 altera:document-type/app-notes
AN 742: PMBus SmartVID Controller Reference Designs 2017-05-08 altera:content-area/power-and-thermal-management altera:document-type/app-notes
AN 747: Implementing PHYLite in Intel Arria 10 Devices Design Examples 2017-05-08 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/app-notes
AN 749: Altera JESD204B IP Core and ADI AD9144 Hardware Checkout Report 2015-12-18 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/app-notes altera:intellectual-property
AN 753: Altera JESD204B IP Core and ADI AD6676 Hardware Checkout Report 2015-11-02 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/app-notes altera:intellectual-property
AN 756: Altera GPIO to Altera PHYLite Design Implementation Guidelines 2017-05-08 altera:document-type/app-notes
AN 768: Multi-Rate (Up to 12G) SDI II Reference Design for Intel Arria 10 Devices 2017-05-08 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/app-notes altera:intellectual-property
AN 770: Partially Reconfiguring a Design on Intel Arria 10 SoC Development Board 2017-11-06 altera:document-type/app-notes altera:development-software
AN 793: Intel Arria 10 DisplayPort 4Kp60 with Video and Image Processing Pipeline Retransmit Reference Design 2017-06-13 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/app-notes,altera:document-type/design-guides altera:intellectual-property
AN 805: Hierarchical Partial Reconfiguration of a Design on Intel Arria 10 SoC Development Board 2017-11-06 altera:document-type/app-notes altera:development-software
AN-744: Scalable Triple Speed Ethernet Reference Design for Arria 10 Devices 2016-04-27 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/app-notes,altera:document-type/reference-design altera:intellectual-property
AN-785: Altera JESD204B IP Core and ADI AD9162 Hardware Checkout Report 2016-12-06 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/app-notes altera:intellectual-property
AN647: Single-Port Triple Speed Ethernet and On-Board PHY Chip Reference Design 2015-12-14 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/app-notes altera:intellectual-property
AN752: Guidelines for Handling Altera Wafer Level Chip Scale Package (WLCSP) 2015-11-02 altera:content-area/pcb-layout-and-packaging altera:document-type/app-notes
AN794: Arria 10 Low Latency Ethernet 10G MAC and XAUI PHY Reference Design 2017-02-01 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/app-notes altera:intellectual-property
Arria 10 1G/10GbE and 10GBASE-KR PHY IP Core Release Notes 2016-10-31 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes
Arria 10 FPGA Development Kit User Guide 2017-09-21 altera:content-area/development-kits altera:document-type/user-guide altera:content-area/recommended-documents
Arria 10 FPLL IP Core Release Notes 2016-10-31 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes
Arria 10 SoC Virtual Platform User Guide 2015-09-16 altera:document-type/user-guide altera:content-area/recommended-documents
Arria 10 SoC Virtual Platform Version 1.0 Release Notes 2015-09-04 altera:document-type/release-notes
Arria 10 Transceiver ATX PLL IP Core Release Notes 2016-10-31 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes
Arria 10 Transceiver CMU PLL IP Core Release Notes 2016-10-31 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes
Arria 10 Transceiver Native PHY IP Core Release Notes 2016-10-31 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes
Configuring Altera FPGAs 2014-12-15 altera:content-area/device-configuration-and-remote-system-upgrades altera:document-type/user-guide
Early Power Estimator for Intel Arria 10 FPGAs User Guide 2016-11-07 altera:content-area/power-and-thermal-management altera:document-type/user-guide altera:development-software
High-speed Reed-Solomon IP Core Release Notes 2017-11-06 altera:content-area/embedded-memory---dsp altera:document-type/release-notes altera:intellectual-property
Hybrid Memory Cube Controller Design Example User Guide 2016-05-02 altera:content-area/external-memory-interface,altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide
Hybrid Memory Cube Controller IP Core Release Notes 2016-05-02 altera:content-area/external-memory-interface,altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes
Hybrid Memory Cube Controller IP Core User Guide 2016-05-02 altera:content-area/external-memory-interface,altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide
Intel Arria 10 Native Fixed Point DSP IP Core User Guide 2016-06-10 altera:document-type/user-guide
Intel Arria 10 Native Floating-Point DSP Intel FPGA IP User Guide 2017-11-06 altera:content-area/embedded-memory---dsp altera:document-type/user-guide altera:intellectual-property
Intel Arria 10 SoC Secure Boot User Guide 2017-11-06 altera:content-area/device-configuration-and-remote-system-upgrades altera:document-type/app-notes
Intel Arria 10 and Intel Cyclone 10 Avalon -MM Interface for PCIe Design Example User Guide 2017-11-06 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
Intel Quartus Prime Standard Edition Handbook Volume 2 Design Implementation and Optimization 2017-11-06 altera:document-type/user-guide altera:development-software
Interlaken PHY IP Core Release Notes 2016-10-31 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes
LDPC IP Core User Guide 2017-11-06 altera:content-area/embedded-memory---dsp altera:document-type/user-guide altera:intellectual-property
Low Latency 100-Gbps Ethernet IP Core Release Notes 2017-07-07 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes altera:intellectual-property
Low Latency 100G Ethernet Design Example User Guide 2017-11-08 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
Low Latency 40- and 100-Gbps Ethernet MAC and PHY IP Core Release Notes 2017-07-08 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes altera:intellectual-property
Low Latency 40- and 100-Gbps Ethernet MAC and PHY MegaCore Function User Guide 2017-12-28 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
Low Latency 40-Gbps Ethernet IP Core Release Notes 2017-07-07 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes altera:intellectual-property
Low Latency 40G Ethernet Example Design User Guide 2017-11-08 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
Nios II Embedded Design Suite Release Notes 2015-06-17 altera:document-type/release-notes,altera:document-type/design-guides
Other Transceiver IP Cores Product Release Notes 2016-10-31 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes
PCI Express Avalon -MM DMA Reference Design 2017-05-08 altera:document-type/app-notes
SDI Audio IP Cores Release Notes 2017-05-08 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes
SerialLite II IP Core Release Notes 2017-05-08 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/release-notes altera:intellectual-property
SmartVID Controller IP Core User Guide 2017-05-08 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide
Using the Altera PDN Tool to Optimize Your Power Delivery Network Design 2015-07-08 altera:content-area/power-and-thermal-management altera:document-type/app-notes
Vision Processing with the Canny Edge Detection Reference Design 2015-02-14 altera:document-type/app-notes
Viterbi IP Core User Guide 2017-11-06 altera:content-area/embedded-memory---dsp altera:document-type/user-guide altera:intellectual-property
100G Interlaken Design Example User Guide 2018-03-22 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
50G Ethernet Design Example User Guide 2019-04-03 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
50G Interlaken Design Example User Guide 2018-03-22 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
AN 704: FPGA-based Safety Separation Design Flow for Rapid Functional Safety Certification 2018-09-01 altera:content-area/device-configuration-and-remote-system-upgrades altera:document-type/app-notes
AN 763: Intel Arria 10 SoC Device Design Guidelines 2020-08-14 altera:content-area/hard-processor-system altera:document-type/app-notes
AN 792: Intel FPGA JESD204B IP Core and ADI AD9371 Hardware Checkout Report 2017-12-18 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/app-notes altera:intellectual-property
AN 798: Partial Reconfiguration with the Arria 10 HPS 2017-01-25 altera:content-area/device-configuration-and-remote-system-upgrades altera:document-type/app-notes,altera:document-type/design-guides
AN 872: Thermal and Power Guidelines: For Intel Programmable Acceleration Card with Intel Arria 10 GX FPGA 2019-08-30 altera:content-area/power-and-thermal-management altera:document-type/app-notes
ASMI Parallel II Intel FPGA IP Core Release Notes 2018-05-07 altera:content-area/device-configuration-and-remote-system-upgrades altera:document-type/release-notes
Altera Complete Design Suite Version 14.0 Arria 10 Edition Update Release Notes 2014-09-01 altera:document-type/release-notes altera:development-software
Arria 10 SoC Boot User Guide 2019-04-03 altera:document-type/user-guide
Arria 10 SoC Development Kit User Guide 2018-08-09 altera:content-area/development-kits altera:document-type/user-guide altera:content-area/recommended-documents
BCH Intel FPGA IP: User Guide 2018-11-30 altera:content-area/embedded-memory---dsp altera:document-type/user-guide altera:intellectual-property
Battery Management System Reference Design 2016-04-02 altera:document-type/reference-manual altera:development-software
Creating Heterogeneous Memory Systems in Intel FPGA SDK for OpenCL Custom Platforms 2016-12-13 altera:content-area/external-memory-interface,altera:content-area/device-configuration-and-remote-system-upgrades,altera:content-area/embedded-memory---dsp altera:document-type/app-notes,altera:document-type/design-guides altera:development-software
Differences Among Intel SoC Device Families 2018-08-22 altera:content-area/external-memory-interface,altera:content-area/hard-processor-system altera:document-type/reference-manual,altera:document-type/user-guide altera:content-area/recommended-documents
Embedded Design Handbook 2020-07-22 altera:content-area/embedded-memory---dsp altera:document-type/design-guides,altera:document-type/user-guide altera:development-software
Embedded Memory (RAM: 1-PORT, RAM: 2-PORT, ROM: 1-PORT, and ROM: 2-PORT) User Guide 2020-03-11 altera:content-area/embedded-memory---dsp altera:document-type/user-guide altera:intellectual-property
FFT IP Core: User Guide 2017-11-06 altera:content-area/embedded-memory---dsp altera:document-type/user-guide altera:intellectual-property
GPIO Intel FPGA IP User Guide: Intel Arria 10 and Intel Cyclone 10 GX Devices 2019-10-01 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
Guidelines for Developing a Nios II HAL Device Driver 2015-06-12 altera:document-type/app-notes,altera:document-type/design-guides
High-speed Reed-Solomon IP Core User Guide 2017-11-06 altera:content-area/embedded-memory---dsp altera:document-type/user-guide altera:intellectual-property
Intel Acceleration Stack for Intel Xeon CPU with FPGAs Core Cache Interface (CCI-P) Reference Manual 2019-11-04 altera:document-type/user-guide
Intel Accelerator Functional Unit Simulation Environment Quick Start User Guide 2020-03-06 altera:content-area/end-applications altera:document-type/user-guide
Intel Arria 10 CvP Initialization and Partial Reconfiguration over PCI Express User Guide 2020-09-01 altera:content-area/device-configuration-and-remote-system-upgrades altera:document-type/user-guide
Intel Arria 10 Device Datasheet 2020-06-26 altera:content-area/external-memory-interface,altera:content-area/device-configuration-and-remote-system-upgrades,altera:content-area/clocking,altera:content-area/i-o-interfaces-protocols-and-signal-integrity,altera:content-area/embedded-memory---dsp,altera:content-area/power-and-thermal-management altera:document-type/data-sheets altera:collection/data-sheet,altera:content-area/recommended-documents
Intel Arria 10 Device Overview 2020-10-20 altera:document-type/device-overview altera:collection/data-sheet,altera:content-area/recommended-documents
Intel FPGA Programmable Acceleration Card N3000 Data Sheet 2020-03-03 altera:document-type/data-sheets altera:collection/data-sheet
Intel FPGA Software Installation and Licensing Quick Start 2018-11-26 altera:document-type/user-guide altera:development-software
Intel FPGA Voltage Sensor IP Core User Guide 2018-02-09 altera:content-area/power-and-thermal-management altera:document-type/user-guide altera:intellectual-property
Intel Quartus Prime Standard Edition Handbook Volume 1 Design and Synthesis 2018-05-09 altera:document-type/user-guide altera:development-software
Intel Quartus Prime Standard Edition Handbook Volume 3 Verification 2018-05-09 altera:document-type/user-guide altera:development-software
Intel SoC FPGA Embedded Development Suite (SoC EDS) Professional Version 20.1 Release Notes 2020-04-24 altera:content-area/hard-processor-system altera:document-type/release-notes altera:development-software
Intel SoC FPGA Embedded Development Suite (SoC EDS) Standard Version 20.1 Release Notes 2020-06-12 altera:content-area/hard-processor-system altera:document-type/release-notes altera:development-software
Intel SoC FPGA Embedded Development Suite User Guide 2020-08-07 altera:content-area/hard-processor-system altera:document-type/user-guide
LVDS SERDES Intel FPGA IP User Guide: Intel Arria 10 and Intel Cyclone 10 GX Devices 2020-09-25 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
NCO IP Core: User Guide 2017-11-06 altera:content-area/embedded-memory---dsp altera:document-type/user-guide altera:intellectual-property
Native Loopback Accelerator Functional Unit (AFU) User Guide 2019-08-05 altera:content-area/end-applications altera:document-type/user-guide
Networking Interface for Open Programmable Acceleration Engine: Intel Programmable Acceleration Card with Intel Arria 10 GX FPGA 2019-08-05 altera:document-type/user-guide
Nios II Processor Reference Guide 2020-10-22 altera:content-area/embedded-memory---dsp altera:document-type/user-guide altera:development-software
OCT Intel FPGA IP User Guide 2019-07-03 altera:content-area/external-memory-interface,altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
PCI Express: Migrating to Stratix 10 from Arria 10 for the Avalon-MM and Avalon-MM DMA Interfaces 2017-01-23 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
Reed-Solomon II IP Core User Guide 2016-05-02 altera:content-area/embedded-memory---dsp altera:document-type/user-guide altera:intellectual-property
Remote Update Intel FPGA IP Core Release Notes 2018-05-07 altera:content-area/device-configuration-and-remote-system-upgrades altera:document-type/release-notes
SerialLite II IP Core User Guide 2019-01-09 altera:content-area/i-o-interfaces-protocols-and-signal-integrity altera:document-type/user-guide altera:intellectual-property
Unique Chip ID Intel FPGA IP Core Release Notes 2018-05-07 altera:content-area/device-configuration-and-remote-system-upgrades altera:document-type/release-notes
Power and Thermal Management
  • AN 711: Power Reduction Features in Arria 10 Devices
  • Device-Specific Power Delivery Network (PDN) Tool 2.0 User Guide
    Power Delivery Network (PDN) Tool 2.0 for Stratix® V, Arria V, Arria II GZ, Cyclone® V, and Cyclone IV Devices
    Power Delivery Network (PDN) Tool 2.0 for Stratix and Arria 10 Devices
Design Guidelines
  • AN 672: Transceiver Link Design Guidelines for High-Gbps Data Rate Transmission
  • AN 738: Arria 10 Device Design Guidelines
     
End Applications
  • AN 425: Using the Command-Line Jam STAPL Solution for Device Programming
  • OTN Family | 200G P-OTS Any-Rate Mapper | TPOC226 (ver 1.0, Mar 2014, 607 KB)
    (SoftSilicon function)
  • OTN Family | 400G Transponder / Muxponder | TPO516 (ver 1.0, Mar 2014, 469 KB)
    (SoftSilicon function)
General Device Documentation
  • Altera I/O Phase-Locked Loop (Altera IOPLL) IP Core User Guide
  • Differences Among Intel SoC Device Families
  • Arria 10 SoC Boot User Guide
  • Arria 10 SoC Secure Boot User Guide
  • Arria 10 SoC Virtual Platform User Guide
  • Arria 10 SoC Virtual Platform Release Notes

Related Links

  • Intel SoC FPGA Overview
  • Architecture Matters