Documentation: HardCopy II Devices

HardCopy II Device Handbook (3 MB)

HardCopy II Device Handbook, Volume 1 (ver 4.5, Sep 2008, 3 MB)

Section I. HardCopy II Device Family Data Sheet

Chapter 1. Introduction to HardCopy II Devices (ver 2.6, Sep 2008, 101 KB)
Chapter 2. Description, Architecture, and Features (ver 2.5, Sep 2008, 239 KB)
Chapter 3. Boundary-Scan Support (ver 2.4, Sep 2008, 118 KB)
Chapter 4. DC and Switching Specifications and Operating Conditions (ver 3.3, Sep 2008, 423 KB)
Chapter 5. Quartus II Support for HardCopy II Devices (ver 2.5, Sep 2008, 663 KB)
Chapter 6. Script-Based Design for HardCopy II Devices (ver 1.3, Sep 2008, 260 KB)
Chapter 7. Timing Constraints for HardCopy II Devices (ver 2.2, Sep 2008, 936 KB)
Chapter 8. Migrating Stratix II Device Resources to HardCopy II Devices (ver 1.4, Sep 2008, 999 KB)

HardCopy II Device Handbook, Volume 2 (ver 4.5, Sep 2008, 285 KB)

Section I. General HardCopy Series Design Considerations

Chapter 1. Design Guidelines for HardCopy Series Devices (ver 3.4, Sep 2008, 243 KB)
Chapter 2. Power-Up Modes and Configuration Emulation in HardCopy Series Devices (ver 2.5, Sep 2008, 289 KB)

Section II. HardCopy Design Center Migration Process

Chapter 3. Back-End Design Flow for HardCopy Series Devices (ver 1.4, Sep 2008, 140 KB)
Chapter 4. Back-End Timing Closure for HardCopy Series Devices (ver 2.4, Sep 2008, 222 KB)

Related Documentation

External Memory Interfaces

AN 328: Interfacing DDR2 SDRAM with Stratix II, Stratix II GX, and Arria GX Devices (ver 6.0, Oct 2009, 3 MB)
ALTMEMPHY Example (604 KB)
Legacy PHY Example (330 KB)
AN 550: Using the DLL Phase Offset Feature in Stratix FPGAs and HardCopy ASICs (ver 2.0, Mar 2010, 547 KB)
altmemphy_ext_dll.zip (48 KB)
altmemphy_int_dll.zip (47 KB)
static_dll.zip (18 KB)
DDR Timing Wizard User Guide (ver 3.0, Nov 2007, 2 MB)
External Memory PHY Interface (ALTMEMPHY) (nonAFI) Megafunction User Guide (ver 7.3, Jan 2010, 3 MB)

Power and Thermal Management

Stratix II, Stratix II GX, and HardCopy II PowerPlay Early Power Estimator (ver 8.1, Nov 2008, 2 MB)
(Final)
PowerPlay Early Power User Guide for Stratix II, Stratix II GX, and HardCopy II (0 bytes)
TB 097: HardCopy II Military Temperature Range Support (ver 1.0, Sep 2007, 190 KB)

I/O Interfaces, Protocols and Signal Integrity

AN 477: Designing RGMII Interface with FPGA and HardCopy Devices (ver 2.0, Jan 2010, 519 KB)
Input Signal Edge Rate Guidance (ver 1.0, Jun 2005, 63 KB)

Design Guidelines

AN 432: Using Different PLL Settings Between Stratix II and HardCopy II Devices (ver 1.2, Mar 2010, 149 KB)
AN 311: ASIC-to-FPGA Design Methodology and Guidelines (ver 3.1, Apr 2009, 286 KB)
AN 453: HardCopy II Fitting Techniques (ver 2.0, Nov 2008, 716 KB)
AN 477: Designing RGMII Interface with FPGA and HardCopy Devices (ver 2.0, Jan 2010, 519 KB)
AN 536: Design Guidelines for Preparing HardCopy II ASICs (ver 1.0, Sep 2008, 1 MB)
HardCopy II Clock Uncertainty Calculator User Guide (ver 1.0, Aug 2007, 611 KB)
HCII_Clock_Uncertainty_Calculator.zip (1,005 KB)

End Applications

Altera FPGAs for radar and advanced sensors (ver 1.0, Oct 2007, 219 KB)

General Device Documentation

Altera FPGAs for radar and advanced sensors (ver 1.0, Oct 2007, 219 KB)
Generating Functionally Equivalent FPGAs and ASICs With a Single Set of RTL and Synthesis/Timing Constraints (ver 1.2, Feb 2009, 459 KB)
HardCopy II ASIC Family Errata Sheet (ver 1.1, Dec 2008, 74 KB)
HardCopy Structured ASIC (ver 1.0, Feb 2006, 1 MB)