Quartus® Prime Pro Edition User Guide: Programmer

ID 683039
Date 4/01/2024
Public
Document Table of Contents

1.2.1.1. Configuration Modes (Programming File Generator)

Select one of the following Configuration modes in Programming File Generator for generation of secondary programming files:
Table 2.  Programming File Generator Configuration Modes
Programming Mode Description Supports Devices
Active Serial x4 For storing configuration data in a low-cost serial configuration device with non-volatile memory and four-pin interface. Serial configuration devices provide a serial interface to access the configuration data. During device configuration, Stratix® 10 devices read the configuration data through the serial interface, decompress the data if necessary, and configure their SRAM cells.
  • Agilex™ 5
  • Agilex™ 7
  • Stratix® 10
AVST x8 The Avalon® streaming configuration mode uses an external host, such as a microprocessor or MAX® 10 device. The external host controls the transfer of configuration data from an external storage such as flash memory to the FPGA. The design that controls the configuration process resides in the external host. You can use the PFL II IP core with an MAX® 10 device as the host to read configuration data from a flash memory device that configures an Stratix® 10 FPGA.
AVST x16
AVST x32
1-Bit Passive Serial An external controller passes configuration data to one or more FPGA devices via a serial data stream. The FPGA device is a slave device with a 5-wire interface to the external controller. The external controller can be an intelligent host such as a microcontroller or CPU. Cyclone® 10 LP
Active Serial Stores configuration data in a low-cost serial configuration device with non-volatile memory and four-pin interface.
Internal Configuration Uses a .pof file for internal configuration of the MAX® 10 device’s Configuration Flash Memory (CFM) and User Flash Memory (UFM) via a download cable Quartus® Prime Programmer. MAX® 10