DisplayPort Intel® FPGA IP User Guide

ID 683273
Date 10/16/2023
Public
Document Table of Contents

10.3.5. DPTX_RECONFIG

RECONFIG_ANALOG drives the tx_analog_reconfig_req while RECONFIG_LINKRATE drives tx_reconfig_req port. GXB_BUSY is indicator of tx_reconfig_busy port.

Address: 0x0014

Direction: RW

Reset: 0x00000000

Table 85.  DPTX_RECONFIG Bits
Bit Bit Name Function
31 GXB_BUSY

Read-only flag where:

  • 0 = Transceiver is not busy
  • 1 = Transceiver is busy
30:2 Unused
1 RECONFIG_LINKRATE 1 = Reconfigure the transceiver with the link rate in DPTX_TX_CONTROL (TX_LINK_RATE)

When you set this bit to 1, it automatically clears (0) after one clock cycle.

0 RECONFIG_ANALOG

1 = Reconfigure transceiver with analog values in DPTX_PRE_VOLT0-3

When you set this bit to 1, it automatically clears (0) after one clock cycle.