Intel® Quartus® Prime Standard Edition User Guide: Design Recommendations

ID 683323
Date 9/24/2018
Public
Document Table of Contents

3.4.2. Force the Identification of Synchronization Registers

Use the guidelines in Identifying Synchronizers for Metastability Analysis to ensure the software reports and optimizes the appropriate register chains.

Identify synchronization registers by setting Synchronizer Identification to Forced If Asynchronous in the Assignment Editor. If there are any registers that the software detects as synchronous, but you want to analyze for metastability, apply the Forced setting to the first synchronizing register. Set Synchronizer Identification to Off for registers that are not synchronizers for asynchronous signals or unrelated clock domains.

To help you find the synchronizers in your design, you can set the global Synchronizer Identification setting on theTiming Analyzer page of the Settings dialog box to Auto to generate a list of all the possible synchronization chains in your design.