Generic Flash Programmer User Guide: Intel® Quartus® Prime Standard Edition

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ID 683491
Date 3/28/2022
Public
Document Table of Contents
Document Table of Contents x
1. Generic Flash Programmer User Guide Intel® Quartus® Prime Standard Edition
1. Generic Flash Programmer User Guide Intel® Quartus® Prime Standard Edition x
1.1. Supported Devices and Configuration Methods 1.2. Quad SPI Flash Byte-Addressing 1.3. Generic Flash Programmer Operation 1.4. Generic Flash Programmer Flow Templates (Convert Programming File) 1.5. Generic Flash Programmer Settings Reference 1.6. Generic Flash Programmer User Guide Revision History
1.3. Generic Flash Programmer Operation x
1.3.1. Generic Flash Programming (Convert Programming File Dialog Box) 1.3.2. Full Erase of Flash Memory Sectors
1.3.1. Generic Flash Programming (Convert Programming File Dialog Box) x
1.3.1.1. Step 1: Generate Primary Device Programming Files 1.3.1.2. Step 2: Generate Secondary Programming Files (Convert Programming Files) 1.3.1.3. Step 3: Program the Flash Memory Device
1.3.1.2. Step 2: Generate Secondary Programming Files (Convert Programming Files) x
1.3.1.2.1. Enabling Bitstream Encryption or Compression for Intel® Arria® 10 and Intel® Cyclone® 10 GX Devices 1.3.1.2.2. Defining a New Flash Memory Configuration Device 1.3.1.2.3. Modifying Programming Flows
1.4. Generic Flash Programmer Flow Templates (Convert Programming File) x
1.4.1. Initialization Flow Templates (Convert Programming File) 1.4.2. Program Flow Template (Convert Programming File) 1.4.3. Erase Flow Template (Convert Programming File) 1.4.4. Verify/Blank-Check/Examine Flow Template (Convert Programming File) 1.4.5. Termination Flow Template (Convert Programming File) 1.4.6. Programming Flow Action Properties
1.5. Generic Flash Programmer Settings Reference x
1.5.1. Convert Programming File Dialog Box 1.5.2. Device and Pin Options 1.5.3. Compression and Encryption Settings (Convert Programming File) 1.5.4. SOF Data Properties Dialog Box (Convert Programming File)
1. Generic Flash Programmer User Guide Intel® Quartus® Prime Standard Edition

1.3.1.1. Step 1: Generate Primary Device Programming Files

The Intel® Quartus® Prime Assembler generates the .sof FPGA configuration file once design compilation is complete. Prior to running the Assembler, you can specify device and pin options that impact the .sof and subsequent .jic file generation.

Follow these steps to generate a .sof file for use in generic flash programming:

  1. Before running the Assembler, click Assignments > Device > Device & Pin Options to specify options for FPGA configuration pins and other hardware settings that the .sof file preserves. The following options are particularly relevant to generic flash programming. For option descriptions, refer to Device and Pin Options.
    • General tab—specify the JTAG user code, configuration clock source, and options for specific configuration pins.
    • Configuration tab—specify Active Serial or Active Serial x4 for the FPGA Configuration scheme. Select Auto for Configuration device I/O voltage, which you can specify with precision at a later time.
    Figure 4. Device & Pin Options Dialog Box
  2. To generate primary device programming files, click Processing > Start > Start Assembler. The Compiler confirms that prerequisite modules are complete, and launches the Assembler to generate the programming files.
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