Cyclone® V SX, ST and SE SoC Device Errata

ID 683618
Date 9/25/2015
Public
Document Table of Contents

1.2.1.6. 740657: Global Timer Can Send Two Interrupts for the Same Event

Description

The global timer can be programmed to generate an interrupt request to the processor when it reaches a given programmed value. The timer may generate two interrupt requests instead of one, if you program the global timer not to use the auto-increment feature.

The Global Timer Control register is programmed with the following settings:

  • When Bit[3]=0, the global timer is programmed in "single-shot" mode.
  • When Bit[2]=1, the global timer IRQ generation is enabled.
  • When bit[1]= 1, the global timer value comparison with the Comparator registers is enabled.
  • When bit[0]= 1, the global timer count is enabled.

With these settings, an IRQ is generated to the processor when the global timer value reaches the value programmed in the Comparator registers. The interrupt handler then performs the following sequence:

  1. Read the ICCIAR (Interrupt Acknowledge) register.
  2. Clear the global timer flag.
  3. Modify the comparator value, to set it to a higher value.
  4. Write the ICCEOIR (End of Interrupt) register.

Under these conditions, because of this erratum, the global timer might generate a second (spurious) interrupt request to the processor at the end of this interrupt handler sequence.

Impact

This erratum creates spurious interrupt requests in the system.

Workaround

Because this erratum happens only when the Global Timer is programmed in “single-shot” mode, that is, when it does not use the auto-increment feature, a first possible workaround is to program the Global Timer to use the auto-increment feature.

If this first solution is not possible, a second workaround is to modify the interrupt handler to avoid the offending sequence. You can achieve this by clearing the global timer flag after incrementing the Comparator register value. The correct code sequence for the interrupt handler should then look like the following sequence:

  1. Read the ICCIAR (Interrupt Acknowledge) register.
  2. Modify the comparator value, to set it to a higher value.
  3. Clear the global timer flag.
  4. Clear the pending status information for interrupt 27 (Global Timer interrupt) in the distributor of the interrupt controller.
  5. Write the ICCEOIR (End of Interrupt) register.

Category

Category 3