AN 713: DC Coupling in Stratix V Devices

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ID 683790
Date 8/10/2015
Public
Document Table of Contents
Document Table of Contents x
1. DC-Coupling in Stratix V Devices
1. DC-Coupling in Stratix V Devices x
1.1. Stratix V DC-Coupling Scenarios 1.2. Document Revision History
1.1. Stratix V DC-Coupling Scenarios x
1.1.1. Connecting a Stratix V PCML Transceiver to Another Stratix V PCML Transceiver 1.1.2. Connecting a Stratix V PCML Transmitter to Another Stratix V LVDS Receiver 1.1.3. Connecting Stratix V PCML Transmitter to Another Altera PCML Receiver 1.1.4. Stratix V PCML Receiver to Another Altera PCML Transmitter 1.1.5. Stratix V PCML Transmitter to Non-Altera Device Receiver 1.1.6. Non-Altera Device Transmitter to Stratix V PCML Receiver
1. DC-Coupling in Stratix V Devices

1.1.2. Connecting a Stratix V PCML Transmitter to Another Stratix V LVDS Receiver

The voltage levels are different for a pseudo current mode logic (PCML) transmitter and a low voltage differential signaling (LVDS) receiver.

However, since the LVDS receiver has a built-in common mode detector, you can directly connect the PCML transmitter output to the LVDS receiver input without using voltage divider circuits to match the voltage levels.

Level Two Title