Visible to Intel only — GUID: nik1410905634020
Ixiasoft
Visible to Intel only — GUID: nik1410905634020
Ixiasoft
5.15.4. Initial VFs and Total VFs Registers
Bits |
Description |
Default Value |
Access |
---|---|---|---|
[15:0] |
Initial VFs. Specifies the initial number of VFs configured for this PF. |
Same value as TotalVFs |
RO |
[31:16] |
Total VFs. Specifies the total number of VFs attached to this PF. |
Set in Platform Designer |
RO |
Bit Location |
Description |
Default Value |
Access |
---|---|---|---|
[15:0] |
NumVFs. Specifies the number of VFs enabled for this PF. Writable only when the VF Enable bit in the SR-IOV Control Register is 0. |
0 |
RW |
[31:16] |
Function Dependency Link |
0 |
RO |
Bits |
Register Description |
Default Value |
Access |
---|---|---|---|
[15:0] |
VF Offset. Specifies the offset of the first VF’s Routing ID with respect to the Routing ID of its PF. The offset is configured for PF0 and PF1 based on the number of VFs and whether ARI is in use. The following offsets are used:
|
Refer to description |
RO |
[31:16] |
VF Stride |
1 | RO |