HDMI Intel® Stratix® 10 FPGA IP Design Example User Guide

ID 683701
Date 1/26/2024
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

2.1. HDMI 2.1 RX-TX Retransmit Design Block Diagram

The HDMI RX-TX retransmit design example demonstrates parallel loopback on simplex channel mode for HDMI 2.1 with Support FRL enabled.
Figure 6. HDMI 2.1 RX-TX Retransmit Block Diagram