AN 307: Intel® FPGA Design Flow for AMD* Xilinx* Users

ID 683562
Date 9/08/2023
Public

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4.3.2.1. PBLOCK

Equivalent to the PBLOCK constraint in the AMD* Xilinx* Vivado* software, Logic Lock regions are floorplan location constraints in the Intel® Quartus® Prime Pro Edition software. Logic Lock region assignments have Placement and Routing Regions
The following example shows how to set a module's attributes in a XDC file, using:
  • EXCLUDE_PLACEMENT—directs the Fitter to place only pblock's logic in the device resources within the pblock region.
  • CONTAIN_ROUTING—directs the Fitter to route signals in the pblock area using only resources available within the pblock area.
In this example, the module does not contain any I/O resources.

XDC Command:

create_pblock pblock_uut_inst
add_cells_to_pblock [get_pblocks pblock_uut_inst] [get_cells -quiet [list uut_inst]]
resize_pblock [get_pblocks pblock_uut_inst] -add {SLICE_X218Y284:SLICE_X220Y346}
resize_pblock [get_pblocks pblock_uut_inst] -add {RAMB18_X12Y114:RAMB18_X12Y137}
resize_pblock [get_pblocks pblock_uut_inst] -add {RAMB36_X12Y57:RAMB36_X12Y68}
set_property CONTAIN_ROUTING 1 [get_pblocks pblock_uut_inst]
set_property EXCLUDE_PLACEMENT 1 [get_pblocks pblock_uut_inst]

Equivalent QSF Command:

set_instance_assignment -name PLACE_REGION "X1 Y1 X20 Y20" -to uut_inst
set_instance_assignment -name RESERVE_PLACE_REGION ON -to uut_inst
set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to uut_inst
set_instance_assignment -name REGION_NAME uut_inst -to uut_inst
set_instance_assignment -name ROUTE_REGION "X1 Y1 X20 Y20" -to uut_inst
REGION_NAME creates an Logic Lock region named “uut_inst”, and assigns module uut_inst to this region. This is similar to XDC's CREATE_PBLOCK and ADD_CELLS_TO_PBLOCK assignments.
set_instance_assignment -name REGION_NAME uut_inst -to uut_inst
PLACE_REGION defines the coordinates for the placement region, similar to XDC's RESIZE_PBLOCK assignments.
set_instance_assignment -name PLACE_REGION "X1 Y1 X20 Y20" -to uut_inst
RESERVE_PLACE_REGION prevents the Fitter from placing other logic in the region, equivalent to XDC's EXCLUDE_PLACEMENT assignment.
set_instance_assignment -name RESERVE_PLACE_REGION ON -to uut_inst
Defining ROUTE_REGION with the same coordinates as PLACE_REGION indicates the routing to remain within the placement region, equivalent to XDC's CONTAIN_ROUTING assignment.
set_instance_assignment -name ROUTE_REGION "X1 Y1 X20 Y20" -to uut_inst
By default, Logic Lock assignments include periphery resources, and you prevent this behavior with the CORE_ONLY_PLACE_REGION logic option. However, in XDC, the default behavior is to exclude periphery resources, so you must apply pblock constraints to include periphery resources in the pblock region.
set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to uut_inst